[Rowson 94] @InProceedings{Rowson:94, author = "James A. Rowson", title = "Hardware/Software Co-Simulation", booktitle = "Proc.~of the 31st Design Automation Conference (DAC~'94)", year = "1994", organization = "ACM", address = "San Diego, CA", OPTmonth = "June", note = "(Tutorial)", OPTannote = "" }
@InProceedings{Rogers:92,
author = "Anne Rogers and Kai Li",
title = "Software Support for Speculative Loads",
pages = "38-50",
booktitle = "Proc.~of the 5th International Conference on Architectural
Support for Programming Languages and Operating Systems",
year = "1992",
month = "October"
}
Evidently contains information about a cycle-level simulator.
More in
@TechReport{Rogers:93,
author = "Anne Rogers and Scott Rosenberg",
title = "Cycle Level {SPIM}",
institution = "Department of Computer Science, Princeton
University",
year = 1993,
address = "Princeton, NJ",
month = "October"
}
Tracing with Pixie Michael D. Smith Center for Integrated Systems Stanford University April 91 ssim: A Superscalar Simulator Mike Johnson AMD M. D. Smith Stanford Univ.Pixie front ends in ftp://velox.stanford.edu/pub
Johnson, Mike: Superscalar microprocessor design Englewood Cliffs, NJ : Prentice Hall, 1991. - XXIV, 288 S. : graph. Darst. (Prentice-Hall series in innovative technology) Literaturverz. S. 273 - 278 ISBN 0-13-875634-1
@Book{Huck:89,
author = {Jerome C. Huck and Michael J. Flynn},
title = {Analyzing Computer Architectures},
publisher = {IEEE Computer Society Press},
year = 1989,
address = {Washington, DC}
}
%A Max Copperman %A Jeff Thomas %T Poor Man's Watchpoints %J ACM SIGPLAN NotIces %V 30 %N 1 %D January 1995 %P 37-44Pardo has a copy. Executive summary: debugging tool; statically patches loads and stores with code to check for data breakpoints.
Amusing story: The processor they were running on has load delay slots and does not have pipeline interlocks. Their tool replaces each load or store with several instructions; it patched a piece of user-mode code of the form
load addr -> r5 store r5 -> addr2Before patching, the code saved the old value of r5 to addr2. After patching, it saved the new value. Technically, this code was broken already because the symptom could have also been exhibited by an interrupt or exception between the load and the store.
``Spike was built inside GNU GCC by Michael Golden and myself. It includes a lot of features that have appeared in ATOM, including the simulator with the benchnark into a single ``self-tracing'' binary. The instruction trace was based on an abstract machine model distilled from GCC's RTL; it had both a high-level and a low-level form. Spike is still in occasional use, but has never been released.''
Basic summary: Wanted to profile. -p/-pg code is larger and slower by enough to make it hard to justify profiling as he default. Assumes the entire source is available. For these and other reasons, wrote jprof which operates with disassembly, analysis and rewriting. Discusses sampling errors, expected accuracy, stability, randomness, etc. Describes jprof: counters and stopwatches; subroutine call graph. Domain/OS on HP/Apollo using 68030. Discusses shared libraries. Can also use page-fault clock. 4-microsecond clocks. Some lessons/observations. Doesn't explain how program running time is affected by jprof.